/* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. See the file COPYING * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Copyright (C) 2010 Frank van Maarseveen */ #ifndef _HARDWARE_H_ #define _HARDWARE_H_ #include #include "bits.h" /* * attiny85 lfuse: 0x62 -> 0x42 make lfuse * 7 CKDIV8: 0 0 init CLKPR[CLKPS] to 0011 (divide clock by 8) * 6 CKOUT 1 1 * 5 SUT1: 1 -> 0 SUT=00: startup/reset asap (6+14CK) * 4 SUT0: 0 0 * 3 CKSEL3 0 0 * 2 CKSEL2 0 0 * 1 CKSEL1 1 1 * 0 CKSEL0 0 0 * * attiny85 hfuse 0xdf -> 0xde make hfuse * 7 RSTDISBL 1 1 note: programming this 0 affects SUT * 6 DWEN 1 1 * 5 SPIEN 0 0 * 4 WDTON 1 1 * 3 EESAVE 1 1 * 2 BODLEVEL2 1 1 * 1 BODLEVEL1 1 1 * 0 BODLEVEL0 1 -> 0 BOD at 1.8V * * attiny85 efuse 0xff -> 0xfe make efuse * 0 SELFPRGGEN 1 -> 0 Enable self-programming * */ #define MHZ 4 /* CLKPR[CLKPS] will be set to 0001, dividing by 2 */ #define PWM1_MAX 160 /* * The signal LED is at pin 5, PB0. it is also used as input sensor for * optical reprogramming. */ #define LED (B, 0) //#define EEPROM_WRITE_LED LED /* * The FET is at pin 6, PB1 (OC1A) */ #define FET (B, 1) /* * Mandatory hardware initialization: CPU clock and anything schematics * related which is critical. Interrupts should still be off. */ __attribute__((always_inline)) static inline void hw_init(void) { CLKPR = _BV(CLKPCE); CLKPR = BIN8(0001); /* CLKPS = 0001, divide final system clock by 2 */ PORTB = 0; DDRB = 0; OUTPUT(FET); /* switch FET off ASAP */ DIDR0 = ~_BV(AIN0D); /* exclude LED */ } /* * ADC configuration and formulas to calculate ADC results from real values (constants) */ #define ILED(a) ((uint16_t)((a) * 0.04 * 20 * 1024 / 1.1 + 0.5)) #define ILED_MIN ILED(0.03) /* 22 */ #define ILED_MAX ILED(1.0) /* 745, max continuous current */ #define ILED_ADMUX (BIN8(0111) | _BV(REFS1)) /* ADC2(+), ADC3(-), gain=20, 1.1Vref */ #define VBAT(v) ((uint16_t)((v) * 10.0 / (10.0 + 22.0) * 1024 / 1.1 + 0.5)) #define VBAT_MIN VBAT(2.0) /* 582, 1.0V per cell (avoid BORF upon switch-off) */ #define VBAT_REED_THRESHOLD VBAT(1.0) /* 291 */ #define VBAT_ADMUX (BIN8(0001) | _BV(REFS1)) /* ADC1, 1.1Vref */ #define TEMP(c) ((uint16_t)((c) * 1.167 + 271)) /* very rough approximation, see manual */ #define TEMP_ADMUX (BIN8(1111) | _BV(REFS1)) /* ADC4, 1.1Vref */ /* * Eeprom logging */ #define EE_SLOT_BASE (0x0002 >> 1) #define EE_PWM1_MAX (0 + EE_SLOT_BASE) #define EE_ILED_MIN (1 + EE_SLOT_BASE) #define EE_ILED_MAX (2 + EE_SLOT_BASE) #define EE_ILED_MINTIME (3 + EE_SLOT_BASE) #define EE_ILED_MAXTIME (4 + EE_SLOT_BASE) #define EE_ILED_MINERR (5 + EE_SLOT_BASE) #define EE_ILED_MAXERR (6 + EE_SLOT_BASE) #define EE_ILED_MAXADJ (7 + EE_SLOT_BASE) #define EE_VBAT_MAX (8 + EE_SLOT_BASE) #define EE_TEMP_MIN (9 + EE_SLOT_BASE) #define EE_TEMP_MAX (10 + EE_SLOT_BASE) #define EE_ON_MAX (11 + EE_SLOT_BASE) // ,, (12 + EE_SLOT_BASE) #define EE_SLOT_END (13 + EE_SLOT_BASE) /* * Dive torch maintained state: on, off, or to implement a reset before calling * the bootloader. */ #define EEAR_RUNLEVEL (0 + (EE_SLOT_END << 1)) /* * The boot-loader needs to maintain state to avoid executing random code * possibly damaging external hardware. Note: do not put anything else in * the same EEPROM page to avoid a bug destroying reprogram capability. */ #define EEAR_FLASH_STATE E2END #endif