/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation. See the file COPYING
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * Copyright (C) 2010 Frank van Maarseveen <frankvm@frankvm.com>
 */

#include <avr/io.h>

#include "common.h"
#include "hardware.h"
#include "bits.h"
#include "timer0.h"
#include "pwm1.h"

#define T0_100US ((uint8_t)(T0_MS * 0.1 + 2))

void pwm1_init(void)
{
	/*
	 * Configure PLL for Timer/Counter 1 clock at 32MHz
	 */
	BIT_SET(PLLCSR, LSM);		/* divide PLL input clock by 2 (Vcc < 2.7V) */
	BIT_SET(PLLCSR, PLLE);		/* Enable PLL: multiply by 8 */
	t0_tickwait(T0_100US);
	while (!BIT_TST(PLLCSR, PLOCK))
		;
	BIT_SET(PLLCSR, PCKE);		/* Timer/Counter1 in asynchronous mode at 8/2*8 = 32MHz */

	/*
	 * Configure OC1A output. When OCR1A = 0 then output is permanently low.
	 */
	pwm1_write(0);			/* default */
	OCR1C = 255;			/* TOP (default) */
	TCCR1 = _BV(PWM1A) |		/* Enable PWM using OCR1A and OCR1C */
		_BV(COM1A1) |		/* Compare mode 10: OC1A cleared on compare match, /OC1A n.c. */
		BIN8(0001);		/* CS13-10 = 0001: enable at PCK/1 = 32 MHz */

	/*
	 * The ADC is supposed to run on 125kHz too. Both 125kHz clocks are phase locked with a random
	 * phase difference. What we're trying to do here is to return with a deterministic phase so
	 * the ADC will always sample the LED current with FET on or off. ADC samples at T=0.5.
	 * This requires ADC initialization right after return.
	 */
	BIT_SET(GTCCR, PSR1);
	TCNT1 = 100;
}

void pwm1_cleanup(void)
{
	pwm1_write(0);
	CLR(FET);
	TCCR1 = 0;
	PLLCSR = 0;
}